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| NB100ELT23L 3.3V Dual Differential LVPECL/LVDS to LVTTL Translator The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23L makes it ideal for applications which require the translation of a clock and a data signal. The ELT23L is available in only the ECL 100K standard. Since there are no LVPECL outputs or an external VBB reference, the ELT23L does not require both ECL standard versions. The LVPECL inputs are differential. Therefore, the NB100ELT23L can accept any standard differential LVPECL/LVDS input referenced from a VCC of +3.3 V. http://onsemi.com MARKING DIAGRAMS* 8 SO-8 D SUFFIX CASE 751 KT23L ALYW 1 8 8 1 TSSOP-8 DT SUFFIX CASE 948R 1 A L Y W = Assembly Location = Wafer Lot = Year = Work Week K23L ALYW 8 1 * * * * * * 2.1 ns Typical Propagation Delay Maximum Operating Frequency > 160 MHz 24 mA LVTTL Outputs Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V Q Output Will Default LOW with Inputs Open or at GND Pb-Free Packages are Available* *For additional information, see Application Note AND8002/D ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. (c) Semiconductor Components Industries, LLC, 2005 1 February, 2005 - Rev. 4 Publication Order Number: NB100ELT23L/D NB100ELT23L Table 1. PIN DESCRIPTION D0 1 8 VCC Q0, Q1 D0 2 LVPECL D1 3 LVTTL 6 Q1 7 Q0 D0**, D1** D0**, D1** VCC GND PIN FUNCTION LVTTL Outputs Differential LVPECL Inputs Positive Supply Ground **Pins will default to VCC/2 when left open. D1 4 5 GND Figure 1. 8-Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value 50 kW 50 kW > 1.5 kV > 100 V > 2 kV Level 1 UL 94 V-0 @ 1.25 in 91 Devices Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34 Table 3. MAXIMUM RATINGS Symbol VCC VI Iout TA Tstg qJA qJC qJA qJC Tsol Power Supply Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C SO-8 SO-8 SO-8 TSSOP-8 TSSOP-8 TSSOP-8 Parameter Condition 1 GND = 0 V GND = 0 V Continuous Surge VI VCC Condition 2 Rating 3.8 3.8 38 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 265 Units V V mA mA C C C/W C/W C/W C/W C/W C/W C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. http://onsemi.com 2 NB100ELT23L Table 4. PECL DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 2) -40C Symbol ICCH ICCL VIH VIL VIHCMR IIH IIL Characteristic Power Supply Current (Outputs set to HIGH) Power Supply Current (Outputs set to LOW) Input HIGH Voltage Input LOW Voltage Input HIGH Voltage Common Mode Range (Note 3) Input HIGH Current Input LOW Current -150 Min 10 15 2075 1355 1.2 Typ 14 19 Max 20 25 2420 1675 3.3 150 -150 Min 10 15 2075 1355 1.2 25C Typ 15 19 Max 20 25 2420 1675 3.3 150 -150 Min 10 15 2075 1355 1.2 85C Typ 15 20 Max 20 25 2420 1675 3.3 150 Unit mA mA mV mV V mA mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. All values vary 1:1 with VCC. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 5. TTL DC CHARACTERISTICS VCC = 3.3 V, GND = 0.0 V, TA = -40C to 85C Symbol VOH VOL IOS Characteristic Output HIGH Voltage Output LOW Voltage Output Short Circuit Current Condition IOH = -3.0 mA IOL = 24 mA -180 Min 2.4 0.5 -50 Typ Max Unit V V mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 6. AC CHARACTERISTICS VCC = 3.3 V $ 5%, GND = 0.0 V (Note 4) -40C Symbol fmax tPLH, tPHL tSK+ + tSK- - tSKPP tJITTER VPP tr tf Characteristic Maximum Frequency Propagation Delay to Output Differential (Note 5) CL = 20 pF Output-to-Output Skew++ Output-to-Output Skew- - Part-to-Part Skew (Note 6) Random Clock Jitter (RMS) Input Voltage Swing (Differential Configuration) Output Rise/Fall Times CL = 20 pF (0.8 V to 2.0 V) 150 700 300 6.0 800 900 Min 160 1.95 2.5 2.95 60 25 500 20 1200 1650 1000 150 700 300 6.0 800 900 Typ Max Min 160 1.95 2.5 2.95 60 25 500 20 1200 1650 1000 150 700 300 6.0 800 900 25C Typ Max Min 160 1.95 2.6 3.25 60 25 500 20 1200 1650 1000 ps 85C Typ Max Unit MHz ns ps mV ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 500 W to GND, CL = 20 pF. 5. Reference (VCC = 3.3 V 5%; GND = 0 V). 6. Skews are measured between outputs under identical conditions. http://onsemi.com 3 NB100ELT23L APPLICATION TTL RECEIVER CHARACTERISTIC TEST *CL includes fixture capacitance CL * RL AC TEST LOAD GND Figure 2. TTL Output Loading Used for Device Evaluation ORDERING INFORMATION Device NB100ELT23LD NB100ELT23LDR2 NB100ELT23LDT NB100ELT23LDTG NB100ELT23LDTR2 NB100ELT23LDTR2G Package SO-8 SO-8 TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) Shipping 98 Units / Rail 2500 Tape & Reel 100 Units / Rail 100 Units / Rail 2500 Tape & Reel 2500 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1642/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices http://onsemi.com 4 NB100ELT23L PACKAGE DIMENSIONS SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-07 ISSUE AE -X- A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M -Y- G C -Z- H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NB100ELT23L PACKAGE DIMENSIONS TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A 8x K REF 0.10 (0.004) M 0.15 (0.006) T U S 2X TU S V S L/2 8 5 L 1 PIN 1 IDENT 4 B -U- 0.25 (0.010) M 0.15 (0.006) T U S A -V- F DETAIL E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ C 0.10 (0.004) -T- SEATING PLANE D -W- G DETAIL E DIM A B C D F G K L M ECLinPS is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 NB100ELT23L/D |
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